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Senior RTL Engineer
3 semanas atrás
We are seeking a seasoned expert in RTL synthesis and physical implementation to join our team.
Key Responsibilities:
- RTL Synthesis and Physical Implementation:
- Develop and implement complex RTL designs using Synopsys tools (Fusion Compiler, Design Compiler, PrimeTime).
- Collaborate with cross-functional teams to ensure design meets technical requirements.
- RTLA and PrimePower Flows:
- Design and optimize RTLA and PrimePower RTL flows for improved performance and power efficiency.
- Model switching activity and perform scenario-based analysis to identify design bottlenecks.
- Scripting and Automation:
- Develop and maintain scripting infrastructure using TCL and Python for flow automation and debugging.
- Implement efficient scripting solutions to streamline workflows and reduce design cycle time.
- Timing Constraints and Low-Power Design:
- Analyze and mitigate timing constraints, UPF, and low-power design methodologies.
- Collaborate with designers and engineers to develop optimized design solutions.
- Process Nodes and Linux:
- Familiarity with advanced process nodes and associated challenges in timing, congestion, and power closure.
- Experience with Linux and bash scripting skills to optimize design workflows.
Requirements:
- 7+ years of experience in RTL synthesis and physical implementation using Synopsys tools.
- Strong command of RTLA and PrimePower RTL flows, including switching activity modeling and scenario-based analysis.
- Proficiency in scripting (TCL, Python) for flow automation and debugging.
- Deep understanding of timing constraints, UPF, and low-power design methodologies.
- Experience with Linux and bash scripting skills preferred.