Application Engineer Manager

3 semanas atrás

Belo Horizonte, Brasil Cadence Design Systems, Inc. Tempo inteiro

Description

Key Responsibilities

In this position, key responsibilities include:

  1. Lead a successful team, architect, and develop solutions for challenging problems in a fast and innovative paced environment, using state of the art technology.
  2. Manage a team of Field Application Engineers to understand customers' key concerns and provide guidance on the best technologies and methodologies to deploy for their success.
  3. Oversee teams in the areas of:
    • Simulation Xcelium
    • Verification Methodologies: UVM, MDV, ABV
    • Regressions
    • Vmanager
    • Emulation on Palladium
    • Prototyping with Protium
    • Jasper Formal
  4. Help Cadence customers effectively deploy our industry-leading verification products to the world’s top Semiconductor and System companies.
  5. Ramp up on functional verification and system validation spaces, which are the fastest growing segments in the semiconductor design industry, being responsible for engagements.
  6. Provide technical support in the Pre and Post-Sales process and work with the FAE and account teams to create innovative solutions to address our customers’ most challenging problems.
  7. Engage and lead the AE team on Pre-sales technical campaigns from the technical side, working alongside Sales and Marketing.
  8. Provide world-class proactive support, training, and problem consultation to ensure user success.
  9. Conduct root cause analysis and resolve customer technical issues.
  10. Collaborate with R&D on Simulation, Emulation, prototyping, and formal areas.
  11. Assist R&D and product engineers in developing competitive and creative technical solutions.
  12. Understand the competitive landscape and continuously work on differentiating Cadence’s solutions.
Minimum Requirements
  • BSE or graduation in related areas
  • Track record of experience leading Technical teams
  • Excellent RTL understanding and coding
  • 6+ years of experience in functional verification
  • Knowledge of Unix, C/C++
  • A strong interest in contributing to customer success with related technical interest in EDA, HDL's, and Logic Design
  • Excellent English written and oral communication skills
Nice to Have Skills
  • Design fundamentals such as architecture, micro-architecture, and synthesis
  • Verification skills such as UVM testbench architecture, development and debug, and SystemVerilog
  • Fundamental SoC Architecture knowledge
  • Embedded software development and HW/SW co-design and co-verification
  • Some knowledge of formal verification technologies
  • Scripting languages such as Perl, Python, TCL, Bash
Additional Job Details
  • Employment category: CLT
  • Employment term: 40 hours/week
  • Location: Av. do Contorno, 5800 - Savassi, Belo Horizonte, Minas Gerais, Brazil.
About Cadence Design Systems

Cadence is the only company that provides the expertise, tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access our website.

We’re doing work that matters. Help us solve what others can’t.

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