Senior Layout Design Engineer
3 semanas atrás
- Senior Layout Design Engineer
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:You are a talented and motivated Layout Design Engineer with a passion for Analog Mixed-Signal layout and verification. With over 2 years of experience in the field, you possess a deep understanding of CMOS and FinFET layouts and process technology, particularly in 28nm and smaller nodes. Your expertise extends to advanced tool usage, floor-planning, and routing, and you have a keen eye for detail when it comes to ESD and latchup layout design considerations. You are well-versed in the ASIC physical design flow, including LEF generation, top-level verification flow, DRC/LVS, and LPE. Your knowledge of EM and IR considerations, DFM, and other critical design aspects makes you an invaluable asset to any team. While scripting skills for layout automation are a plus, your excellent written and verbal communication skills ensure effective interactions with internal development teams.
What You’ll Be Doing:- Designing and verifying Analog Mixed-Signal layouts, with a focus on high-speed SerDes IPs.
- Utilizing advanced tools for floor-planning and routing to optimize layout designs.
- Applying deep submicron effect mitigation techniques to ensure design robustness.
- Generating LEF files and integrating them into the top-level verification flow.
- Conducting DRC, LVS, and LPE to ensure layout compliance and performance.
- Collaborating with internal teams to address ESD and latchup design considerations.
- Implementing EM and IR considerations to maintain design integrity.
- Leveraging scripting skills to automate repetitive layout tasks, enhancing efficiency.
- Contributing to the development of industry-leading Analog Mixed-Signal IPs.
- Ensuring the robustness and reliability of high-speed SerDes designs.
- Optimizing layout designs to achieve superior performance and manufacturability.
- Enhancing the overall quality and compliance of ASIC physical designs.
- Facilitating seamless integration of layout designs into top-level verification flows.
- Driving innovation through effective collaboration and communication with internal teams.
- BTech/MTech in Electronics/Electrical Engineering.
- 2+ years of experience in Analog Mixed-Signal layout and verification.
- Proficiency in CMOS and FinFET layouts and process technology (28nm and smaller).
- Advanced understanding of deep submicron effects and mitigation techniques.
- Experience with advanced tool usage, floor-planning, and routing.
- Knowledge of ESD and latchup layout design considerations.
- Familiarity with the ASIC physical design flow, LEF generation, and top-level verification flow.
- Understanding of DRC, LVS, LPE, EM, IR considerations, and DFM.
- Strong scripting skills for layout automation (preferred).
- Excellent written and verbal communication skills.
- Detail-oriented with a strong analytical mindset.
- A proactive problem solver with a passion for innovation.
- Collaborative and able to work effectively in a team environment.
- Adaptable and capable of handling multiple tasks simultaneously.
- Committed to continuous learning and professional development.
You will be joining a dynamic and innovative team focused on developing cutting-edge Analog Mixed-Signal IPs. Our team thrives on collaboration, creativity, and a shared commitment to excellence. Together, we tackle complex design challenges and push the boundaries of technology to deliver high-performance solutions.
Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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Região Geográfica Intermediária de Pouso Alegre, Brasil Synopsys, Inc. Tempo inteiroWe are seeking a highly skilled Analog Mixed-Signal Layout Specialist to join our team at Synopsys, Inc. This is an exciting opportunity to contribute to the development of cutting-edge Analog Mixed-Signal IPs.Job Description:This role involves designing and verifying high-speed SerDes IPs, utilizing advanced tools for floor-planning and routing to optimize...
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