Application Engineer Manager

Há 4 dias

Belo Horizonte, Minas Gerais, Brasil Cadence Design Systems, Inc. Tempo inteiro
About the Role

Cadence Design Systems, Inc. is seeking a highly skilled and experienced Application Engineer Manager to join our team. As a key member of our verification team, you will be responsible for leading successful teams, architecting and developing solutions for challenging problems in a fast-paced environment.

Key Responsibilities
  • Lead a team of Field Application Engineers to understand customer key care about and provide guidance on the best technologies and methodologies to deploy to enable their success.
  • Oversee teams on areas of Simulation Xcelium, Verification Methodologies: UVM, MDV, ABV, regressions, Vmanager, Emulation on Palladium and prototyping with Protium, and also Jasper Formal.
  • Help Cadence customers effectively deploy our industry-leading verification products to the world's top Semiconductor and System companies.
  • Ramp up on functional verification and system validation spaces which are the fastest-growing segments in semiconductor design industry, being responsible for engagements.
  • Provide technical support in the Pre and Post-Sales process and will work with the FAE and account team to come up with innovative solutions to address our customers' most challenging problems.
  • Engage and lead AE team on Pre-sales technical campaigns from the technical side, work along with Sales and Marketing.
  • Provide world-class proactive support, training, and problem consultation to make our users successful.
  • Conduct root cause analysis and provide resolution to customer technical issues.
  • Collaborate with R&D on: Simulation, Emulation, prototyping and formal areas.
  • Help R&D and product engineers develop competitive and creative technical solutions.
  • Understand the competitive landscape and continuously work on differentiating Cadence's solutions.
Requirements
  • BSE or graduation on related areas.
  • Track of record of experience leading Technical team.
  • Excellent RTL understanding and coding.
  • 6+ Experience on functional verification.
  • Knowledge of Unix, C/C++.
  • A strong interest in contributing to customer success with related technical interest in EDA, HDL's, and Logic Design.
  • Excellent English written and oral communication skills.
Nice to Have Skills
  • Design fundamentals such as architecture, micro-architecture, HDLs Synthesis and timing.
  • Verification skills such as UVM testbench architecture, development and debug, SystemVerilog, SVA.
  • Fundamental SoC Architecture knowledge.
  • Embedded software development and HW/SW co-design and co-verification.
  • Some knowledge on formal verification technologies.
  • Scripting languages such as Perl, Python, TCL, Bash.

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